X86 microop ISA

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Revision as of 19:06, 27 September 2007 by Gblack (talk | contribs) (New page: ==== Register Ops ==== === Addition and subtraction === == Add == == Adc == == Sub == == Sbb == === Multiplication and division === == Mul1s == == Mul1u == == Mulel == == Muleh =...)
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Register Ops

Addition and subtraction

Add

Adc

Sub

Sbb

Multiplication and division

Mul1s

Mul1u

Mulel

Muleh

Div1

Div2

Divq

Divr

Logic

Or

And

Xor

Shifts and Rotates

Sll

Srl

Sra

Ror

Rcr

Rol

Rcl

Data transfer and conversion

Mov

Sext

Zext

Ruflag

Ruflags

Wruflags

Control transfer

Br

Rdip

Wrip

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