Difference between revisions of "User workshop 2015"

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with each other.  
 
with each other.  
  
===Tentative Program===
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===Final Program===
  
 
{| class="wikitable" width="75%" style="margin: 1em auto 1em auto"
 
{| class="wikitable" width="75%" style="margin: 1em auto 1em auto"
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| [[Media:2015_ws_01_introduction.pdf|Introduction &  Overview of Changes]] || style="text-align:right"|9:00 AM || Steve Reinhardt || AMD
 
| [[Media:2015_ws_01_introduction.pdf|Introduction &  Overview of Changes]] || style="text-align:right"|9:00 AM || Steve Reinhardt || AMD
 
|-
 
|-
| Classic Memory System Re-visited || style="text-align:right"|9:30 AM || Andreas Hansson || ARM
+
| [[Media:2015_ws_02_hansson_gem5_workshop_2015.pdf|Classic Memory System Re-visited]] || style="text-align:right"|9:30 AM || Andreas Hansson || ARM
 
|-
 
|-
 
| colspan="4" align="center" style="background:lightgreen" | User Perspectives  
 
| colspan="4" align="center" style="background:lightgreen" | User Perspectives  
 
|-
 
|-
| AMD's gem5 APU Simulator || style="text-align:right"|10:00 AM || Brad Beckmann || AMD
+
| [[Media:2015_ws_03_amd-apu-model.pdf|AMD's gem5 APU Simulator]] || style="text-align:right"|10:00 AM || Brad Beckmann || AMD
 
|-
 
|-
| NoMali: Understanding the Impact of Software Rendering Using a Stub GPU || style="text-align:right"|10:15 AM || Andreas Sandberg || ARM
+
| [[Media:2015_ws_04_ISCA_2015_NoMali.pdf|NoMali: Understanding the Impact of Software Rendering Using a Stub GPU]] || style="text-align:right"|10:15 AM || Andreas Sandberg || ARM
 
|-
 
|-
 
| Cycle-Accurate STT-MRAM model in gem5 || style="text-align:right"|10:30 AM || Cong Ma || University of Minnesota
 
| Cycle-Accurate STT-MRAM model in gem5 || style="text-align:right"|10:30 AM || Cong Ma || University of Minnesota
 
|-
 
|-
| An Accurate and Detailed Prefetching Simulation Framework for gem5 || style="text-align:right"|10:45 AM || Martí Torrents Lapuerta || Polytechnic University of Catalonia
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| [[Media:2015_ws_06_TorrentsM_gem5_prefetcher.pdf|An Accurate and Detailed Prefetching Simulation Framework for gem5]] || style="text-align:right"|10:45 AM || Martí Torrents Lapuerta || Polytechnic University of Catalonia
 
|- style="background:lightgray"
 
|- style="background:lightgray"
 
| Break || style="text-align:right"|11:00 AM ||  ||  
 
| Break || style="text-align:right"|11:00 AM ||  ||  
 
|-
 
|-
| Supporting Native PThreads in SE Mode || style="text-align:right"|11:30 AM || Brandon Potter || AMD
+
| [[Media:2015_ws_07_pthread.pdf|Supporting Native PThreads in SE Mode]] || style="text-align:right"|11:30 AM || Brandon Potter || AMD
 
|-
 
|-
| Dynamically Linked Executables in SE Mode || style="text-align:right"|11:45 AM || Brandon Potter || AMD
+
| [[Media:2015_ws_08_dynamic-linker.pdf|Dynamically Linked Executables in SE Mode]] || style="text-align:right"|11:45 AM || Brandon Potter || AMD
 
|-
 
|-
| Coupling gem5 with SystemC TLM 2.0 Virtual Platforms || style="text-align:right"|12:00 PM || Matthias Jung || University of Kaiserslautern
+
| [[Media:2015_ws_09_2015-06-14_Gem5_ISCA.pptx|Coupling gem5 with SystemC TLM 2.0 Virtual Platforms]] || style="text-align:right"|12:00 PM || Matthias Jung || University of Kaiserslautern
 
|-
 
|-
| SST/gem5 Integration || style="text-align:right"|12:15 PM || Simon D. Hammond || Sandia
+
| [[Media:2015_ws_10_sstGem5ISCA.pptx|SST/gem5 Integration]] || style="text-align:right"|12:15 PM || Simon D. Hammond || Sandia
 
|- style="background:lightgray"
 
|- style="background:lightgray"
 
| Lunch || style="text-align:right"|12:30 PM ||  ||  
 
| Lunch || style="text-align:right"|12:30 PM ||  ||  
 
|-
 
|-
| Full-System Simulation at Near Native Speed || style="text-align:right"|1:30 PM || Trevor Carlson || Uppsala University
+
| [[Media:2015_ws_11_20150614_-_Trevor_E._Carlson_-_gem5_workshop.pptx|Full-System Simulation at Near Native Speed]] || style="text-align:right"|1:30 PM || Trevor Carlson || Uppsala University
 
|-
 
|-
| Enabling x86 KVM-Based CPU Model in Syscall Emulation Mode || style="text-align:right"|1:45 PM || Alexandru Dutu || AMD
+
| [[Media:2015_ws_12_KVM-in-SE.pdf|Enabling x86 KVM-Based CPU Model in Syscall Emulation Mode]] || style="text-align:right"|1:45 PM || Alexandru Dutu || AMD
 
|-
 
|-
| Parallel gem5 Simulation of Many-Core Systems with Software-Progammable Memories || style="text-align:right"|2:00 PM || Bryan Donyanavard || UC Irvine
+
| [[Media:2015_ws_13_gem5-manycore-spm.pdf|Parallel gem5 Simulation of Many-Core Systems with Software-Progammable Memories]] || style="text-align:right"|2:00 PM || Bryan Donyanavard || UC Irvine
 
|-
 
|-
| Infrastructure for AVF Modeling || style="text-align:right"|2:15 PM || Mark Wilkening || AMD
+
| [[Media:2015_ws_14_AVFInfrastructure.pdf|Infrastructure for AVF Modeling]] || style="text-align:right"|2:15 PM || Mark Wilkening || AMD
 
|-
 
|-
| gem5-Aladdin Integration for Heterogeneous SoC Modeling || style="text-align:right"|2:30 PM || Y. Sophia Shao || Harvard University
+
| [[Media:2015_ws_15_isca2015-gem5-aladdin.pptx|gem5-Aladdin Integration for Heterogeneous SoC Modeling]] || style="text-align:right"|2:30 PM || Y. Sophia Shao || Harvard University
 
|-
 
|-
| Experiences Implementing Tinuso in gem5 || style="text-align:right"|2:45 PM || Maxwell Walter || Technical University of Denmark
+
| [[Media:2015_ws_16_gem5-workshop_mwalter.pptx|Experiences Implementing Tinuso in gem5]] || style="text-align:right"|2:45 PM || Maxwell Walter || Technical University of Denmark
 
|-
 
|-
| Experiences with gem5 || style="text-align:right"|3:00 PM || Miquel Moretó Planas || BSC/UPC
+
| [[Media:2015_ws_17_mmoreto-gem5userworkshop-2015.pptx|Experiences with gem5]] || style="text-align:right"|3:00 PM || Miquel Moretó Planas || BSC/UPC
 
|-
 
|-
| Little Shop of gem5 Horrors || style="text-align:right"|3:15pm || Jason Power || University of Wisconsin
+
| [https://docs.google.com/presentation/d/1QGA5UVaVJkkMITF2TXCY_KlwmfWef1KBzfDP6ocbj7I/pub?start=false&loop=false&delayms=3000 Little Shop of gem5 Horrors] (see also [http://www.lowepower.com/jason/gem5-horrors-and-what-we-can-do-about-it.html Jason's blog post]) || style="text-align:right"|3:15pm || Jason Power || University of Wisconsin
 
|- style="background:lightgray"
 
|- style="background:lightgray"
 
| Break || style="text-align:right"|3:30 PM ||  ||
 
| Break || style="text-align:right"|3:30 PM ||  ||
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| colspan="4" align="center" |
 
| colspan="4" align="center" |
 
|-
 
|-
| Conclusions || style="text-align:right"|5:30 PM || Ali Saidi || ARM
+
| [[Media:2015_ws_19_gem5_workshop_conclusions.pptx|Conclusions]] || style="text-align:right"|5:30 PM || Ali Saidi || ARM
  
 
|}
 
|}

Latest revision as of 13:30, 16 December 2015

Second gem5 User Workshop
June 14th, 2015; Portland, OR

Following up from a successful 2012 workshop, it is time for the 2015 edition of the gem5 user workshop. The primary objective of this workshop is to bring together groups across the community who are actively using gem5. Discussion topics will include the activity of the gem5 community, how we can best leverage each others contributions, and how we continue to make gem5 a successful, community-supported simulation framework. Those who will get the most out of the workshop are current users of gem5, although anyone is welcome to attend.

The key part of the workshop is a set of presentations from the community about how individuals or groups are using the simulator, any features you have added that might be useful to others, and any major pain points, and what can be done to make gem5 better and more broadly adopted. The hope is that this will provide a forum for people with similar uses or needs to connect with each other.

Final Program

Topic Time Presenter Affiliation
Introduction & Overview of Changes 9:00 AM Steve Reinhardt AMD
Classic Memory System Re-visited 9:30 AM Andreas Hansson ARM
User Perspectives
AMD's gem5 APU Simulator 10:00 AM Brad Beckmann AMD
NoMali: Understanding the Impact of Software Rendering Using a Stub GPU 10:15 AM Andreas Sandberg ARM
Cycle-Accurate STT-MRAM model in gem5 10:30 AM Cong Ma University of Minnesota
An Accurate and Detailed Prefetching Simulation Framework for gem5 10:45 AM Martí Torrents Lapuerta Polytechnic University of Catalonia
Break 11:00 AM
Supporting Native PThreads in SE Mode 11:30 AM Brandon Potter AMD
Dynamically Linked Executables in SE Mode 11:45 AM Brandon Potter AMD
Coupling gem5 with SystemC TLM 2.0 Virtual Platforms 12:00 PM Matthias Jung University of Kaiserslautern
SST/gem5 Integration 12:15 PM Simon D. Hammond Sandia
Lunch 12:30 PM
Full-System Simulation at Near Native Speed 1:30 PM Trevor Carlson Uppsala University
Enabling x86 KVM-Based CPU Model in Syscall Emulation Mode 1:45 PM Alexandru Dutu AMD
Parallel gem5 Simulation of Many-Core Systems with Software-Progammable Memories 2:00 PM Bryan Donyanavard UC Irvine
Infrastructure for AVF Modeling 2:15 PM Mark Wilkening AMD
gem5-Aladdin Integration for Heterogeneous SoC Modeling 2:30 PM Y. Sophia Shao Harvard University
Experiences Implementing Tinuso in gem5 2:45 PM Maxwell Walter Technical University of Denmark
Experiences with gem5 3:00 PM Miquel Moretó Planas BSC/UPC
Little Shop of gem5 Horrors (see also Jason's blog post) 3:15pm Jason Power University of Wisconsin
Break 3:30 PM
Breakout Sessions
Breakout Sessions 4:00 PM Breakout Groups
Wrap-Up 5:00 PM Everyone
Conclusions 5:30 PM Ali Saidi ARM