Difference between revisions of "Supported Architectures"

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|-
 
|-
 
| ALPHA
 
| ALPHA
| None
+
| style="background: LightCoral" | None
| High
+
| style="background: LightGreen" | High
| Linux
+
| style="background: Khaki" | Linux
| Medium
+
| style="background: Khaki" | Medium
| Low
+
| style="background: LightCoral" | Low
| Low
+
| style="background: LightCoral" | Low
 
|-
 
|-
 
| ARM
 
| ARM
| Andreas Sandberg
+
| style="background: LightGreen" | Andreas Sandberg
| High
+
| style="background: LightGreen" | High
| Linux, BSD, Android
+
| style="background: LightGreen" | Linux, BSD, Android
| High
+
| style="background: LightGreen" | High
| High
+
| style="background: LightGreen" | High
| High
+
| style="background: LightGreen" | High
 
|-
 
|-
 
| MIPS
 
| MIPS
| None
+
| style="background: LightCoral" | None
| Low
+
| style="background: LightCoral" | Low
| None
+
| style="background: LightCoral" | None
| Low
+
| style="background: LightCoral" | Low
| Medium
+
| style="background: Khaki" | Medium
| Medium
+
| style="background: Khaki" | Medium
 
|-
 
|-
 
| POWER
 
| POWER
| None
+
| style="background: LightCoral" | None
| Low
+
| style="background: LightCoral" | Low
| None
+
| style="background: LightCoral" | None
| Low
+
| style="background: LightCoral" | Low
| Medium
+
| style="background: Khaki" | Medium
| Medium
+
| style="background: Khaki" | Medium
 
|-
 
|-
 
| RISC-V
 
| RISC-V
| Alec Roelke
+
| style="background: LightGreen" | Alec Roelke
| Medium
+
| style="background: Khaki" | Medium
| None
+
| style="background: LightCoral" | None
| Low
+
| style="background: LightCoral" | Low
| Low
+
| style="background: Khaki" | Medium
| Low
+
| style="background: Khaki" | Medium
 
|-
 
|-
 
| SPARC
 
| SPARC
| None
+
| style="background: LightGreen" | Gabe Black
| Low
+
| style="background: LightCoral" | Low
| None
+
| style="background: LightCoral" | None
| Low
+
| style="background: LightCoral" | Low
| Low
+
| style="background: LightCoral" | Low
| Low
+
| style="background: LightCoral" | Low
 
|-
 
|-
 
| X86
 
| X86
| Tony Gutierrez
+
| style="background: LightGreen" | Gabe Black
| Medium
+
| style="background: Khaki" | Medium
| Linux, BSD
+
| style="background: Khaki" | Linux, BSD
| Medium
+
| style="background: Khaki" | Medium
| High
+
| style="background: LightGreen" | High
| High
+
| style="background: LightGreen" | High
 
|}
 
|}

Latest revision as of 20:46, 18 April 2017

gem5 is a flexible architecture simulator that supports a number of ISAs and operating systems for both full-system simulation (booting an entire operating system) and syscall emulation (running one or more applications by emulating syscalls). An overview of the architecture support is given in the table below.

ISA Maintainer Level of ISA support Full-system OS support Test coverage Tool chain availability Linux kernel availability
ALPHA None High Linux Medium Low Low
ARM Andreas Sandberg High Linux, BSD, Android High High High
MIPS None Low None Low Medium Medium
POWER None Low None Low Medium Medium
RISC-V Alec Roelke Medium None Low Medium Medium
SPARC Gabe Black Low None Low Low Low
X86 Gabe Black Medium Linux, BSD Medium High High