Status Matrix

From gem5

Revision as of 22:01, 28 February 2011 by Beckmann (talk | contribs)

(diff) ← Older revision | Latest revision (diff) | Newer revision → (diff)

Jump to: navigation, search

Contents

1 Alpha
2 x86
3 ARM
4 SPARC
5 PowerPC
6 MIPS

Alpha

x86

ARM

SPARC

PowerPC

MIPS

Processor			Memory System
Cpu Model	System	Processor Count	Classic	Ruby
Cpu Model	System	Processor Count	Classic	MI_example	MOESI_hammer	MESI_CMP_directory	MOESI_CMP_directory	MOESI_CMP_token
Atomic	SE	uniprocessor
	SE	mulitprocessor
	FS	uniprocessor
	FS	mulitprocessor
TimingSimple	SE	uniprocessor
	SE	mulitprocessor
	FS	uniprocessor
	FS	mulitprocessor
In-Order	SE	uniprocessor
	SE	mulitprocessor
	FS	uniprocessor
	FS	mulitprocessor
o3	SE	uniprocessor
	SE	mulitprocessor
	FS	uniprocessor
	FS	mulitprocessor

Retrieved from "http://repo.m5sim.org/wiki/index.php?title=Status_Matrix&oldid=2958"

Navigation menu