Difference between revisions of "Status Matrix"

From gem5
Jump to: navigation, search
Line 1: Line 1:
 +
=== Alpha ===
 +
 +
=== x86 ===
 +
 +
=== ARM ===
 +
 +
=== SPARC ===
 +
 +
=== PowerPC ===
 +
 +
=== MIPS ===
 +
 
{| border="1"
 
{| border="1"
 
!colspan="3"|Processor
 
!colspan="3"|Processor

Revision as of 22:01, 28 February 2011

Alpha

x86

ARM

SPARC

PowerPC

MIPS

Processor Memory System
Cpu Model System Processor Count Classic Ruby
MI_example MOESI_hammer MESI_CMP_directory MOESI_CMP_directory MOESI_CMP_token
Atomic SE uniprocessor
mulitprocessor
FS uniprocessor
mulitprocessor
TimingSimple SE uniprocessor
mulitprocessor
FS uniprocessor
mulitprocessor
In-Order SE uniprocessor
mulitprocessor
FS uniprocessor
mulitprocessor
o3 SE uniprocessor
mulitprocessor
FS uniprocessor
mulitprocessor
Retrieved from "http://repo.m5sim.org/wiki/index.php?title=Status_Matrix&oldid=2958"