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  • The purpose of this page is to list the areas where M5 is dependent on the alpha architecture, and discuss ways to remove or quarantine the dependencies. ...not to an access spans page boundaries. Other than this, this file is not alpha specific, and can be moved somewhere else. My suggestion is that it moves t
    22 KB (3,775 words) - 17:35, 6 June 2007
  • ...the PC of the next instruction. Conventional non-delayed branches (as in Alpha) write to NPC to change the next instruction executed. Conceptually all no ...r disables that model and set it in MIPS and SPARC and leave it cleared in Alpha.
    13 KB (2,075 words) - 17:35, 6 June 2007
  • ...e are many systems of m5 that aren't ready to support something that's not alpha, let alone two things. ...s hard to implement once there have been sufficient changes to allow ''non-alpha'' architectures at all. I would estimate that the majority of the work invo
    4 KB (644 words) - 17:36, 6 June 2007
  • # the ability to say "if (ISA == Alpha)" in some syntax to insert isa-specific code in mostly non-isa-specific fil ...standard names, e.g. isa_traits.hh. These headers will be located in arch/alpha, arch/sparc, arch/mips, etc.
    3 KB (434 words) - 17:52, 6 June 2007
  • * PIL - Like IPL on alpha
    5 KB (731 words) - 17:38, 6 June 2007
  • * To cross compile a kernel <code> make ARCH=alpha CROSS_COMPILE=alpha-unknown-linux-gnu-</code>
    974 bytes (154 words) - 01:05, 25 June 2008
  • Where ARCH is alpha or sparc, OPSYS is linux or tru64, BENCHMARK is the name of the spec binary workload = gzip_log('alpha', 'tru64', 'smred')
    2 KB (393 words) - 00:10, 28 August 2012
  • ...ger zero register and the floating point zero register. This is correct in Alpha, but SPARC doesn't have a zero floating point register, and not all archite ...ers), or in interrupt.hh. There should be an alpha_traits.hh for analogous Alpha specific ISA parameters
    9 KB (1,365 words) - 14:00, 2 July 2007
  • ...enabling effective support of multiple ISAs. Currently gem5 supports the Alpha, ARM, SPARC, MIPS, POWER, RISC-V and x86 ISAs. See [[Supported Architecture ** '''Alpha''': gem5 models a DEC Tsunami system in sufficient detail to boot unmodifie
    9 KB (1,267 words) - 19:36, 29 August 2018
  • scons EXTRAS=/path/to/encumbered build/ALPHA/gem5.opt
    3 KB (459 words) - 20:27, 22 May 2015
  • * Multiple ISA support (Alpha, ARM, MIPS, and SPARC)
    5 KB (752 words) - 18:33, 30 January 2008
  • | ALPHA
    2 KB (255 words) - 16:46, 18 April 2017
  • #::# Support for Alpha LL/SC (which the M5 code confusingly calls "locked" operations).
    9 KB (1,422 words) - 18:43, 25 January 2009
  • ...em such as Linux or Solaris (full-system) on most major ISAs (SPARC, MIPS, ALPHA, ARM, x86/64). The simulator is written in a combination of C++ and Python
    10 KB (1,456 words) - 15:01, 12 March 2008
  • ===== Build the cross-compiler for alpha machine ===== ...tool/ http://kegel.com/crosstool] and modify these three lines in the demo-alpha.sh :
    17 KB (2,335 words) - 17:09, 17 September 2016
  • make ARCH=alpha CROSS_COMPILE=alpha-unknown-linux-gnu- vmlinux
    2 KB (356 words) - 15:13, 5 September 2014
  • ## edit demo-alpha.sh ### eval `cat ...dat ...dat` sh all.sh --> eval `cat alpha.dat gcc-4.2.4-glibc-2.3.6-tls.dat` sh all.sh --notest
    3 KB (431 words) - 11:18, 10 February 2009
  • *ALPHA - '''completed'''
    2 KB (331 words) - 07:57, 19 June 2011
  • === Alpha === ...plementation in gem5 can support from 4 to 64. To compile a new kernel for Alpha follow the directions below:
    3 KB (428 words) - 06:37, 7 September 2015
  • # [[Alpha Implementation]]
    4 KB (588 words) - 02:22, 28 November 2016

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