Difference between revisions of "Defining ISAs (as of M5 2.0 beta 3)"
From gem5
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+ | * '''''NOTE: THIS PAGE IS UNDER CONSTRUCTION. HOPE TO FINISH SOON!!!''''' | ||
+ | ==Overview== | ||
First, make sure you have basic understanding of the ISA description objects within the M5 framework. A good start is the [[The M5 ISA description language]] page. | First, make sure you have basic understanding of the ISA description objects within the M5 framework. A good start is the [[The M5 ISA description language]] page. | ||
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Your new ISA description, MyISA, will need to generate correct instructions for the different CPU models. More specifically, your MyISA description is the primary generator for yoru | Your new ISA description, MyISA, will need to generate correct instructions for the different CPU models. More specifically, your MyISA description is the primary generator for yoru | ||
− | + | == Making M5 Recognize MyISA == | |
− | + | ||
− | + | ||
− | + | == MyISA Architecture - src/arch/MyISA/isa_traits.hh == | |
− | + | ||
− | + | ||
− | + | == MyISA Formats & Templates - src/arch/MyISA/formats/*.isa == | |
− | |||
− | + | == MyISA Decoder - src/arch/MyISA/decoder.isa == | |
− | |||
− | |||
− | '''Test | + | '''Now Test Your Decoder:''' |
<pre> | <pre> | ||
− | build/ | + | scons build/MYISA_SE/arch/MyISA/atomic_simple_cpu_exec.cc CPU_MODELS=AtomicSimpleCPU |
</pre> | </pre> |
Revision as of 15:02, 17 May 2007
- NOTE: THIS PAGE IS UNDER CONSTRUCTION. HOPE TO FINISH SOON!!!
Contents
Overview
First, make sure you have basic understanding of the ISA description objects within the M5 framework. A good start is the The M5 ISA description language page.
Your new ISA description, MyISA, will need to generate correct instructions for the different CPU models. More specifically, your MyISA description is the primary generator for yoru
Making M5 Recognize MyISA
MyISA Architecture - src/arch/MyISA/isa_traits.hh
MyISA Formats & Templates - src/arch/MyISA/formats/*.isa
MyISA Decoder - src/arch/MyISA/decoder.isa
Now Test Your Decoder:
scons build/MYISA_SE/arch/MyISA/atomic_simple_cpu_exec.cc CPU_MODELS=AtomicSimpleCPU