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  • The purpose of this page is to list the areas where M5 is dependent on the alpha architecture, and discuss ways to remove or quarantine the dependencies. ...not to an access spans page boundaries. Other than this, this file is not alpha specific, and can be moved somewhere else. My suggestion is that it moves t
    22 KB (3,775 words) - 21:35, 6 June 2007

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  • ...ond to any real system. BigTsunami support is included in the standard M5 Alpha build, but booting with more than 4 CPUs requires modifications to the PAL ...xample, After building ALPHA, they will be located in the build/ALPHA/arch/alpha/ folder. The key files are decoder.hh, decoder.cc (which describe the ISA
    16 KB (2,739 words) - 10:28, 5 June 2018
  • Here is an example of running all of the 'quick' regression tests for the ALPHA architecture in syscall-emulation (SE) mode. You can leave out any of the t % scons build/ALPHA/tests/debug/quick/se
    7 KB (1,087 words) - 16:47, 3 July 2015
  • * [http://en.wikipedia.org/wiki/DEC_Alpha Alpha]
    3 KB (418 words) - 19:38, 4 April 2012
  • ...et endianess, however full-system simulation may have cross-endian issues (ALPHA full-system is known not to work on big endian machines). ...different guest architecture. The currently available architectures are '''ALPHA''', '''ARM''', '''MIPS''', '''POWER''', '''SPARC''', and '''X86'''. In addi
    7 KB (1,098 words) - 15:07, 24 September 2019
  • % build/ALPHA/gem5.debug -h command line: build/ALPHA/gem5.opt configs/example/se.py -h
    16 KB (2,431 words) - 14:57, 18 February 2019
  • ...ehavior. For example it's used when secondary CPUs being executing code on ALPHA.
    11 KB (1,774 words) - 08:46, 13 April 2018
  • * Multiple ISA support (Alpha, MIPS, and SPARC) ...6, HP Tru64 5.1, or [http://l4ka.org/projects/pistachio L4Ka::Pistachio]) (Alpha only at this time... coming in the future for MIPS and SPARC)
    6 KB (824 words) - 16:01, 18 June 2006
  • ...ass StaticInst, and its class definition is in in build/ALPHA_{FS|SE}/arch/alpha/decoder.hh. This object is used throughout the simulation to represent the ...s or to the instruction categories defined by the ISA. For example, in the Alpha ISA, an "addq" instruction could generate an instance of one of three diffe
    5 KB (782 words) - 17:07, 30 July 2010
  • ...eclaration template (see the <code>BasicExecDeclare</code> template in the Alpha ISA description).
    22 KB (3,474 words) - 17:54, 22 June 2006
  • ...thon dictionary which maps a type extension to type name. For example, the Alpha ISA definition is as follows: Thus the Alpha 32-bit add instruction addl could be defined as:
    11 KB (1,686 words) - 00:40, 6 July 2011
  • ...nt any additional state or functions that might be needed. See src/cpu/o3/alpha/dyn_inst.hh for an example of this.
    1 KB (156 words) - 00:34, 6 July 2011
  • ...or the v2.0 release. It is an out of order CPU model loosely based on the Alpha 21264. This page will give you a general overview of the O3CPU model, the ...tions it predicts as ready to issue (in terms of memory ordering). In the Alpha models, memory operations have been atomic operations where the address cal
    7 KB (1,062 words) - 08:15, 11 July 2012
  • :For example, the following command will build both the optimized Alpha syscall emulation and debug MIPS syscall emulation targets using up to 4 co % scons -j 4 build/ALPHA/m5.opt build/MIPS/m5.debug
    4 KB (665 words) - 04:10, 28 August 2012
  • # compile a cross-compiler capable of building alpha binaries. # wherever you want your workspace, type: <code>ptxdist clone m5-alpha <your workspace name></code>. This will create a workspace directory with
    4 KB (644 words) - 18:43, 19 March 2011
  • ...uses a particular ISA, Alpha for instance, but don't have access to actual Alpha hardware. There are various sources for cross compilers, listed here in rou
    2 KB (323 words) - 16:13, 20 May 2014
  • * Alpha * [http://www.gem5.org/dist/m5_benchmarks/v1-splash-alpha.tgz SPLASH benchmarks] -- See the [[Splash benchmarks]] page for more infor
    5 KB (850 words) - 00:07, 22 November 2019
  • * You can build a cross-compiler to compile the binaries on non-Alpha platforms (see [[Using linux-dist to Create Disk Images and Kernels for M5] ...the Tru64 Pthreads library. (This code actually predates M5's support for Alpha Linux.) There is a lot of complex code in <tt>src/kern/tru64</tt> that atte
    6 KB (1,043 words) - 16:14, 1 December 2018
  • architecture (analagous to ALPHA,MIPS,SPARC,etc.) to be plugged into System-Call Emulation (SE) and Full-Sys
    3 KB (511 words) - 04:33, 20 January 2010
  • * [[Alpha Dependencies]]
    1 KB (146 words) - 15:04, 2 July 2008
  • ** Gabe: LSQ coherence (needed for non-Alpha ISAs) [http://www.m5sim.org/flyspray/task/268 flyspray]
    2 KB (271 words) - 21:34, 6 June 2007

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